The invention relates to optical devices such as planar light-wave components/circuits which are designed to have a high waveguide pattern density effecting a higher etch selectivity and overall improved dimensional control of the functional waveguides on the optical device.
There is an increasing demand for telecommunication capacity as a result of increased Internet traffic, a growing number of telephone lines for telephones, fax, and computer modems, and an increase in other telecommunication services. The enormous capacity of optical networks and communication systems is one means of addressing this increasing demand. Photonic devices for optical network management and wavelength multiplexing and demultiplexing applications have been extensively researched for a number of years.
A significant class of such devices is commonly called xe2x80x9cplanar light-wave circuitsxe2x80x9d or xe2x80x9cplanar light-wave chipsxe2x80x9d or just PLCs. PLCs comprise technologies wherein complex optical components and networks are disposed monolithically within a stack or stacks of optical thin films supported by a common mechanical substrate such as a semiconductor or glass wafer. PLCs are typically designed to provide specific transport or routing functions for use within fiber-optic communications networks. These networks are distributed over a multitude of geographically dispersed terminations and commonly include transport between terminations via single-mode optical fiber. For a device in such a network to provide transparent management of the optical signals it must maintain the single-mode nature of the optical signal. As such, the PLCs are commonly, though not strictly, based on configurations of single-mode waveguides. Since optical signals do not require return paths, these waveguide configurations do not typically conform to the classic definition of xe2x80x9ccircuitsxe2x80x9d, but due to their physical and functional resemblance to electronic circuits, the waveguide systems are also often referred to as circuits.
The standard family of materials for PLCs, widely demonstrated to have superior loss characteristics, is based on silicon dioxide (SiO2), commonly called silica. The silica stack includes layers that may be pure silica as well as layers that may be doped with other elements such as Boron, Phosphorous, Germanium, or other elements or materials. The doping permits control of index-of-refraction and other necessary physical properties of the layers. Silica, including doped silica, as well as a few less commonly used oxides of other elements, are commonly also referred to collectively as xe2x80x9coxides.xe2x80x9d Furthermore, although technically the term xe2x80x9cglassxe2x80x9d refers to a state of matter that can be achieved by a broad spectrum of materials, it is common for xe2x80x9cglassxe2x80x9d to be taken to mean a clear, non crystalline material, typically SiO2 based. It is therefore also common to hear of oxide waveguides being referred to as xe2x80x9cglassxe2x80x9d waveguides. Subsequently, the moniker xe2x80x9csilicaxe2x80x9d is used to refer to those silicon oxide materials suitable for making waveguides or other integrated photonic devices. It is important to note that in the context of this invention, other waveguide materials, such as lithium niobate, spin-on glasses, silicon, siliconoxynitride, or polymers, are also appropriate.
In a typical example of a PLC, a waveguide may comprise three layers of silica glass are used with the core layer lying between the top cladding layer and the bottom cladding layer. In some instances, a top cladding may not be used. Waveguides are often formed by at least partially removing (typically with an etching process) core material beyond the transverse limits of the channel waveguide and replacing it with at least one layer of side cladding material that has an index of refraction that is lower than that of the core material. The side cladding material is usually the same material as the top cladding material. In this example, each layer is doped in a manner such that the core layer has a higher index of refraction than either the top cladding or bottom cladding. When layers of silica glass are used for the optical layers, the layers are typically situated on a silicon wafer. As a second example, waveguides comprise three or more layers of InGaAsP. In this example, adjacent layers have compositions with different percentages of the constituent elements In, P, Ga, and As. As a third example, one or more of the optical layers of the waveguide may comprise an optically transparent polymer. Another example of a waveguide comprises a layer with a graded index such that the region of highest index of refraction is bounded by regions of lower indices of refraction. A doped-silica waveguide is usually preferred because it has a number of attractive properties including low cost, low loss, low birefringence, stability, and compatibility for coupling to fiber.
The use of PLCs in optical networks and communications presents challenges inherent to the PLCs themselves. One such challenge is obtaining dimensional control over the waveguides in the PLCs. Variation or fluctuations in the dimensions of the waveguide often deteriorates the performance characteristics of the PLC. The deterioration in performance of a PLC may eventually reduce the capacity or effectiveness of the overall optical system.
The PLCs referred to herein may be formed using standard techniques used in the semiconductor industry to deposit and pattern optical waveguide materials, e.g., (wet-etch, flame hydrolysis deposition (FHD), chemical vapor deposition (CVD), reactive ion etching (RIE), physically enhanced CVD (PECVD), etc.) FIGS. 1A-1D conceptually illustrates one example of a process of fabrication of an optical waveguide. For simplicity of illustration, the waveguide is shown to have a simple geometry. However, it is understood that a waveguide may have a more complex layout/geometry as described below.
FIG. 1A illustrates a substrate 16 with a lower cladding 14 located on the substrate 16 and a core material 12 deposited on the lower cladding 14. Typically the core material 12 has an index of refraction larger than the cladding material. FIG. 1B illustrates a mask 18 which is deposited on the core material 12. The mask 18 may be a metal (hard-mask) or photoresist mask as required by the particular application. In any case, the pattern of the mask 18 is the same as the desired pattern of the waveguide desired. FIG. 1C illustrates the transfer of pattern to form a waveguide 10. As discussed above, the transfer occurs through the use of various etching techniques in which the core material 12 and the mask 18 is removed via the etching process. As illustrated in FIG. 1D, the waveguide 10 is then covered by a top cladding layer 20, which may have the same index as the lower cladding layer 14.
To produce the desired waveguide pattern on a device, there must be a high ratio of the removal rate of the core material to the removal rate of the mask material. The ratio of the removal rate of the core material to the mask material is commonly referred to as xe2x80x9cetch selectivity.xe2x80x9d However, in situations where there is a low ratio of the surface area of masked material to the surface area of unmasked core material, it is common to experience a low etch selectivity. The low etch selectivity makes it difficult to control the dimensions of the fabricated waveguide. Accordingly, since the total surface area of the waveguide on a PLC is usually 10% of the total surface area of the substrate, it is common to experience a low etch selectivity when etching PLCs.
Prior attempts of addressing the problem with a low etch selectivity, include the use of various hard-mask materials, such as Chrome. However, such attempts posed several considerable disadvantages. For example, etching of a chrome mask requires wet chemicals which do not provides adequate dimensional control of the Critical Dimension CD of the waveguides. Etching and removal of hard-mask materials requires toxic chemicals which demands special handling and waste management. Such demands result in increased production costs. Moreover, the process of depositing the hard-mask leaves deposits inside the etch tool which eventually contaminate the PLC device.
FIGS. 2A-2B demonstrate one example of a problem caused by low etch selectivity. FIG. 2A illustrates a cross section of a waveguide 10 on an ideally formed PLC 22. As shown, in an ideally formed PLC 22 the waveguide 10 will have a width and depth wherein the depth is controlled by the amount of cladding 12 present on the substrate during fabrication. The width, on the other hand, is known as the critical dimension (CD) and should be uniform throughout a profile 26 of the waveguide 10 and throughout the path of the waveguide 10. FIG. 2B illustrates a more common PLC 24 in which the CD is not uniform throughout a profile 28 of the waveguide 10. For illustrative purposes, an ideal profile 26 is illustrated in phantom lines over the actual profile 28 of the waveguide 10. As shown from the illustration, this problem is difficult to overcome as even directional etching techniques, such as reactive ion etching (RIE), have a lateral etching component which affects the profile 28 of the waveguide 10 when etching with a low etch selectivity.
One attempt at reducing variation in core width is taught in U.S. Pat. No. 5,940,555 (""555) entitled OPTICAL MULTIPLEXER/DEMULTIPLEXER, the entirety of which is hereby incorporated by reference. ""555 teaches providing artificial waveguides on both sides of an arrayed waveguide diffraction grating in an optical multiplexer/demultiplexer to reduce the maximum variation in core width of the waveguides in the diffraction grating.
However, there remains a need to improve etch selectivity and to improve the dimensional control of the waveguides in the PLC across the entire device substrate.
The invention includes devices and methods for improving the etch selectivity and dimensional control of PLCs across the wafer. Etch selectivity is known to depend upon the etch chemistry, pattern density of the waveguides, pattern layout of the waveguides, as well as the mask material. The invention described herein increases etch selectivity by adding load structures to the PLC. A load structure is defined as a structure, usually comprising the core material, which remains after the etching process removes the mask material and the unmasked core material. The load structure will have a width and depth/height where the depth/height may be, but is not limited to, the depth of the core material which is deposited prior to etching. The load structures form a pattern over the PLC that is known as etch loading. Usually, the pattern is formed on a mask and the pattern is then transferred to the PLC via the etching process. Although the load structures are discussed as a plurality of load structures, the invention contemplates a single load structure comprising a network of connected branches.
Certain configuration of etch loading, including but not limited to, etch loading density, directional placement of the load structures, pitch, distance of the load structure from the waveguides, etc. may improve the etch selectivity as well as the dimensional control of the waveguides of the PLC.
The invention includes a planar light-wave circuit for manipulating an optical signal, the planar light-wave circuit comprising a cladding layer having a cladding surface area, a plurality of optical waveguides on the cladding layer and forming a pattern of optical waveguides, the pattern of optical waveguides adapted to define an optical path, wherein the optical path routes the optical signal, a plurality of load structures on the cladding layer that forms a pattern of etch loading, wherein each of the load structures is separated from each the optical waveguide by at least a proximity correction distance. Cladding surface area is intended to mean the surface area of cladding layer that was covered by core material layer prior to etching. Therefore, if a wafer contains a cladding surface and a portion of the cladding surface is covered with a core material that is to be later masked and etched, then the cladding surface area is portion the surface area of the cladding actually covered by the core material.
Another variation of the invention includes a planar light-wave circuit as described above wherein the proximity correction distance may depend upon the particular PLC.
Some examples of PLCs used with this invention include arrayed waveguide gratings, variable optical attenuators, optical add/drop multiplexers, dynamic dispersion compensators, dynamic gain equalization filters, optical power splitters, optical couplers, optical shutters, optical switches, and optical taps.
Variations of the invention include devices having various etch load patterns. The orientation of the etch load pattern may be defined relative to a center-line of the pattern of optical waveguides. For example, if the device is an AWG, the central axis may be an imaginary axis along the surface of the AWG which intersects the center of the waveguides in the AWG""s phased array. If the device is a VOA, the central axis may be an imaginary axis along the surface of the device which intersects the center of the waveguides. In an optical device where there is only one waveguide, the central axis could be defined as being along the surface of the device and intersecting the center of the waveguide in a direction perpendicular to the waveguide. Although the orientation of an etch load pattern is often defined relative to the waveguides, it may also be defined relative to a side or boundary of the of entire PLC.
Variations of the device include a total surface area of the optical waveguide pattern and the etch load pattern which define an etch loading area being at least 25% of the substrate surface area.
The invention further includes a method of manufacturing a planar light-wave circuit for manipulating an optical signal, the method comprising: forming a mask of optical waveguides defining at least one optical waveguide pattern on a core material, the core material being on a substrate or on a bottom cladding where the bottom cladding is on the substrate; and forming a mask of load structures defining at least one etch load pattern on the core material.
A variation of the inventive method includes forming the mask of optical waveguides and the mask of load structures on the same mask.
Another variation of the inventive method includes forming more than one optical waveguide pattern on a wafer and further providing load structures on the wafer which form an etch load pattern.